CRASH: Cognitive Radio Accelerated with Software and Hardware
Two key algorithms in Cognitive Radio are spectrum sensing and the spectrum decision. Many spectrum sensing algorithms have inherent parallelism and map well to a Field Programmable Gate Array (FPGA). Conversely, spectrum decision algorithms tend to require more sequential processing and lean towards a software implementation. These processing requirements suggest implementation on a heterogeneous computing system that accelerates parallel algorithms by offloading them to the FPGA fabric while performing sequential processing on the CPU.
Recently, FPGA vendors have released System-on-Chip (SoC) devices that tightly couple programmable logic and a multicore ARM processor. Due to the low latency interconnect, these SoCs show promise as an effective heterogeneous computing system. We have developed CRASH (Cognitive Radio Accelerated with Software and Hardware), a new software and programmable logic framework for Xilinx's Zynq SoC, to explore their potential in accelerating Cognitive Radio. CRASH provides the framework and interfaces to facilitate splitting algorithms between the Zynq's ARM processor and FPGA fabric. We built CRASH on a Xilinx ZC706 Zynq development board and used an Ettus Research USRP N210 software defined radio as the RF hardware. We leveraged CRUSH's
hardware to implement a high speed serial interface between the Z706 and the USRP. This provides CRASH to use the full bandwidth of the USRP's ADC and DAC (100 Megasamples per second) with minimal latency.
To demonstrate CRASH, we implemented the spectrum decision in software and offloaded spectrum sensing to the FPGA fabric using our framework. For comparison, we also created a version with both algorithms in software. We determined the performance of each configuration by measuring the latency in sensing unoccupied spectrum and then transmitting in the spectrum. Compared to the purely software implementation, CRASH's improved processing performance reduced total system latency (or turnaround time) by 50%.
CRASH creates a low latency, high performance cognitive radio platform that simplifies offloading algorithms to programmable logic. This research shows that heterogeneous computing systems, such as CRASH, can provide cognitive radios substantial processing gains without sacrificing programmability.
|Figure 1: Block diagram of the CRASH Framework on Xilinx Zynq
||Figure 2: CRASH Hardware
CRASH Installation Instructions
Prerequisite Hardware and Software
CRASH is built with OpenEmbedded (OE) -- a powerful toolkit for creating embedded Linux distributions. We use OE to build all the required files to boot the ZC706 development board: the Linux kernel, DAS U-Boot boot loader, root filesystem, and the BOOT.BIN file.
Download all necessary files (with Google's git-repo tool and a manifest file):
curl http://commondatastorage.googleapis.com/git-repo-downloads/repo > repo
chmod a+x repo
sudo mv repo /usr/local/bin/
git clone git://github.com/balister/oe-gnuradio-manifest.git -b stable
repo init -u git://github.com/jpendlum/crash-manifest.git
- oe-repo: OpenEmbedded files
- meta-sdr: OE layer to build UHD and GNU Radio
- meta-xilinx: OE layer that adds support for Zynq devices
- meta-crash: OE layer that adds the core CRASH files (crash-kmod and LibCRASH)
- gr-crash: GNU Radio support for CRASH
- crash: CRASH FPGA design files
- crash-uhd: FPGA design files for USRP N200 and N210 modified to add support for CRASH
- images: Files to program USRP N210 and N200
- oe-gnuradio-manifest: Used by our repo manifest crash-manifest to ensure we get the latest stable OpenEmbedded and meta-sdr layers
Run the bash script to set up settings to run Xilinx tools:
> cd /opt/Xilinx/14.7/ISE_DS
> chmod 777 settings64.sh
Run the OE initialization script and build:
> cd oe-repo
Note: Bitbake takes several hours and uses ~40 GB of hard drive space
> TEMPLATECONF=`pwd`/meta-crash/conf source ./oe-core/oe-init-build-env ./build ./bitbake
> bitbake gnuradio-dev-image
The output files end up in oe-repo/build/tmp-eglibc/deploy/images/zc706-zynq7/. The directory will contain many files. The files we need are:
Copy Files to SD Card
- uImage: Linux kernel with modified header for U-Boot
- u-boot.elf: Das U-Boot boot loader
- uImage-zc706-zynq7-crash.dtb: Device tree blob
- gnuradio-dev-image-zc706-zynq7.tar.gz: Root filesystem
- BOOT-zc706-zynq7.BIN: Xilinx special boot file that includes the first stage boot loader and FPGA bit stream
- uEnv-zc706-zynq7.txt: Plain text file to set U-Boot environmental variables to boot from the SD card
The ZC706 development board can boot from a SD card. However, the SD card must be formatted with two partitions: one named BOOT, fat32, size 40MB, marked as bootable and another named rootfs, ext4, rest of the free space. Once formatted, copy the files:
cp BOOT-zc706-zynq7.BIN /path-to-sd-card/BOOT/BOOT.BIN
cp uEnv-zc706-zynq7.txt /path-to-sd-card/BOOT/uEnv.txt
cp uImage /path-to-sd-card/BOOT/uImage
cp uImage-zc706-zynq7-crash.dtb /path-to-sd-card/BOOT/devicetree.dtb
sudo tar -C /path-to-sd-card/rootfs/ -xzpf gnuradio-dev-image-zc706-zynq7-crash.tar.gz
Files to add CRASH support for GNU Radio and useful utilities:
cp -r gr-crash /path-to-sd-card/rootfs/home/root/
Configure Hardware to Boot from the SD Card
cp -r crash/arm/utils /path-to-sd-card/rootfs/home/root/
The ZC706 development has a set of DIP switches to determine the boot mode. Out of the box, all the boards should be set to boot from the SD card.
Boot the Board
The root file system has SSH built in and will start the DHCP client on boot up. Since the root user does not have a password, it is advisable to not connect ethernet on the first boot up and set the root password through the USB serial port.
Program USRP with CRASH's modified firmware
The USRP must run a modified firmware image to support CRASH. The prebuilt files are located in crash-uhd/images
and programming instructions for custom firmware can be found in the USRP N2x0 User Manual
Modifying the CRASH FPGA design
The FPGA design files for CRASH are located in the crash
directory. The source files are located in crash/fpga/src
. The FPGA design makefile resides in crash/fpga/zc706
- J. Pendlum, M. Leeser, and K. R. Chowdhury, "Reducing Processing Latency with a Heterogeneous FPGA-Processor Framework,"
IEEE Field-Programmable Custom Computing Machines, 2014
- CRASH: Cognitive Radio Accelerated with Software and Hardware, Jonathon Pendlum, MS Thesis, Northeastern University Dept. of ECE, April 2014 [PDF].
We would like to thank:
- Xilinx for their software and hardware donations
- MathWorks for their generous support